一、多端口ROM的实现(使用多个block ram堆实现的)主要使用指令#pragma HLS RESOURCE variableindex_data coreROM_nP_BRAM#include array_FIFO.h//#include hls_stream.hvoid array_process(dout_t d_o[4], din_t d_i[4]){#pragma HLS INLINE offFor_Loop: for (int i0;i4;i) {d_o[i] d_i[i];}}void array_FIFO (dout_t d_o[4], din_t d_i[4], didx_t idx[4]) {#pragma HLS ARRAY_PARTITION variabled_i complete dim1#pragma HLS INTERFACE s_axilite portd_iint i;const din_t index_data[4]{1,2,3,4};//实现了四个read port的ROM#pragma HLS RESOURCE variableindex_data coreROM_nP_BRAMdin_t local_buff[4];#pragma HLS ARRAY_PARTITION variablelocal_buff complete dim0// Breaks FIFO interface d_o[3] d_i[2];For_Loop: for (i0;i4;i) {#pragma HLS UNROLL//#pragma HLS PIPELINE II1local_buff[i] d_i[index_data[i]];}array_process(d_o, local_buff);}上述代码的ROM是4个port底层其实是使用两个双端口的block ram来实现的。这两个block ram中都存储着同一个部分的内容这样是可以来解决数据同一个bank撞车问题。二、多端口ROM的实现(使用多个lut ram堆实现的)void array_process(dout_t d_o[4], din_t d_i[4]){#pragma HLS INLINE offFor_Loop: for (int i0;i4;i) {d_o[i] d_i[i];}}void array_FIFO (dout_t d_o[4], din_t d_i[4], didx_t idx[4]) {#pragma HLS ARRAY_PARTITION variabled_i complete dim1#pragma HLS INTERFACE s_axilite portd_iint i;const din_t index_data[4]{1,2,3,4};//实现了四个read port的ROM#pragma HLS RESOURCE variableindex_data coreROM_nP_LUTRAMdin_t local_buff[4];#pragma HLS ARRAY_PARTITION variablelocal_buff complete dim0// Breaks FIFO interface d_o[3] d_i[2];For_Loop: for (i0;i4;i) {#pragma HLS UNROLL//#pragma HLS PIPELINE II1local_buff[i] d_i[index_data[i]];}array_process(d_o, local_buff);}三、虽然没有RAM_NPORT这个东西的指令其实你可以从上述设计逻辑自己定义结构也能实现类似ROM_NPORT的东西。举一反三这个对设计有很大的帮助了避免数组访问bank撞车。
多端口ROM的实现
发布时间:2026/5/25 3:09:05
一、多端口ROM的实现(使用多个block ram堆实现的)主要使用指令#pragma HLS RESOURCE variableindex_data coreROM_nP_BRAM#include array_FIFO.h//#include hls_stream.hvoid array_process(dout_t d_o[4], din_t d_i[4]){#pragma HLS INLINE offFor_Loop: for (int i0;i4;i) {d_o[i] d_i[i];}}void array_FIFO (dout_t d_o[4], din_t d_i[4], didx_t idx[4]) {#pragma HLS ARRAY_PARTITION variabled_i complete dim1#pragma HLS INTERFACE s_axilite portd_iint i;const din_t index_data[4]{1,2,3,4};//实现了四个read port的ROM#pragma HLS RESOURCE variableindex_data coreROM_nP_BRAMdin_t local_buff[4];#pragma HLS ARRAY_PARTITION variablelocal_buff complete dim0// Breaks FIFO interface d_o[3] d_i[2];For_Loop: for (i0;i4;i) {#pragma HLS UNROLL//#pragma HLS PIPELINE II1local_buff[i] d_i[index_data[i]];}array_process(d_o, local_buff);}上述代码的ROM是4个port底层其实是使用两个双端口的block ram来实现的。这两个block ram中都存储着同一个部分的内容这样是可以来解决数据同一个bank撞车问题。二、多端口ROM的实现(使用多个lut ram堆实现的)void array_process(dout_t d_o[4], din_t d_i[4]){#pragma HLS INLINE offFor_Loop: for (int i0;i4;i) {d_o[i] d_i[i];}}void array_FIFO (dout_t d_o[4], din_t d_i[4], didx_t idx[4]) {#pragma HLS ARRAY_PARTITION variabled_i complete dim1#pragma HLS INTERFACE s_axilite portd_iint i;const din_t index_data[4]{1,2,3,4};//实现了四个read port的ROM#pragma HLS RESOURCE variableindex_data coreROM_nP_LUTRAMdin_t local_buff[4];#pragma HLS ARRAY_PARTITION variablelocal_buff complete dim0// Breaks FIFO interface d_o[3] d_i[2];For_Loop: for (i0;i4;i) {#pragma HLS UNROLL//#pragma HLS PIPELINE II1local_buff[i] d_i[index_data[i]];}array_process(d_o, local_buff);}三、虽然没有RAM_NPORT这个东西的指令其实你可以从上述设计逻辑自己定义结构也能实现类似ROM_NPORT的东西。举一反三这个对设计有很大的帮助了避免数组访问bank撞车。